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introductionThere are many kinds of voice recording chips, but the ISD series chips of the US ISD company are favored by the majority of users. It uses the direct analog storage patent technology to store the voice signals directly in the on-chip EEPROM memory in the original analog form. A/D conversion and compression processing, without the impact of most solid-state digital sound storage technology on sound quality, thereby reducing distortion, greatly improving the quality of recording and playback, and has anti-power failure, good sound quality, easy to use, and can be repeatedly recorded and played. No need for dedicated voice development tools, free to change the content and power consumption, it is suitable for live recording and playback systems.
ISD series voice recording chips are widely used in automation communication systems, mobile phones, smart instruments and other electronic products that require voice prompts. This article describes the application of ISD33180 in an electronic stethoscope that can perform heart sound recording.
Figure 1 ISD33000 Series Package Drawing |
Introduction to ISD33000
The ISD33120/150/180/240 series is a single-chip voice recording/discharging device powered by a 3-volt power supply that can store voice messages of 2.0, 2.5, 3.0 to 4 minutes. The different recording and playback times of the four models are achieved by different input sampling rates, which are 8.0, 6.4, 5.3, and 4.0 kHz, respectively. The CMOS process chip includes an internal clock oscillator, anti-aliasing filter, smoothing filter, auto selector, audio amplifier, and high-density multi-layer memory array. The EEPROM of the ISD33000 series has a capacity of 960K and can store 800 lines of voice information.
The ISD33000 series is available in TSOP and DIP/SOIC packages, as shown in Figure 1.
SS chip select signal (low level allows the chip to work);
MOSI serial data input;
MISO serial data output;
SCLK serial clock signal;
VCCA, VCCD analog and digital circuit power supply;
VSSA, VSSD analog ground and digital ground;
AUD OUT audio signal output, which can drive 5kΩ load;
AM CAP automatic squelch control terminal;
ANA IN-, ANA IN+ analog signal input, analog signal can be single-ended input and differential input;
The RAC line addresses the clock. When the end of each row of memory is reached, the pin maintains a high level of 137.5ms and a low level of 12.5ms, which can be used for information management.
INT interrupt (active low);
XCLK external clock input.
A set of four-wire (SCLK, MOSI, MISO, SS) SPI interfaces provide control and addressing capabilities for the ISD33000 family. The ISD33000 series is structured as a peripheral device based on a microcontroller SPI bus interface. Read and write operations for all internal loggers are implemented via the SPI interface. The convention for data conversion is that the SPI conversion latch of the microcontroller is locked at the falling edge of SCLK. For ISD33000 devices, the data on the MOSI pin is locked on the rising edge of SCLK, and the internal data is on the falling edge of SCLK. The output is locked to the MISO pin. The interrupt signal (INT) and the internal read-only status logger are for the purpose of providing a handshake signal. The control bits and address bits are distributed as follows: <5-bit control bits> and <11-bit address bits>. It should be noted that the ISD33120/150/180/240 device only needs 10 address bits, but the 11th bit is reserved for the longer recording time. For each operation that ends with EOM and OVF, including the information retrieval cycle, an interrupt is generated. This interrupt will be cleared when the next SPI cycle is active.
Table 1 Control Bit Summary |
The designed electronic stethoscope is similar to an ordinary recorder in picking up heart sounds. It can be played, recorded, and searched between records. Here, the 89C51 type single chip microcomputer is used as the controller of the voice chip, and the user's intention is expressed by the button.
The relationship between each instruction and control bits is shown in Table 1. The ISD33000 device can only be operated after TPUD time (about 25ms for products with a sampling frequency of 8kHz). The time the user waits for TPUD before issuing an operation command. Taking the playback operation as an example, the playback operation starting from the address address should be performed as follows:
Issue the POWERUP command;
Waiting for TPUD time (start delay time);
Issue the SETPLAY command from the address address;
Issue the PLAY command.
An interrupt is generated when the EOM tag is found, and then the playback operation is stopped.
In this application, the P1 port of the single chip microcomputer is designed as a human machine interface, and the P2 port is a communication port of the single chip computer and the voice chip. The buttons of the P1 port are: K1 button is the play record selection button (P/R); K2 button is the start button (START); K3 button is the stop button (STOP); K4 button is the forward button (PRE); K5 button It is the back button (NEXT), in which the K1 button is a toggle switch, and the other buttons are all non-self-locking buttons, which send a pulse signal. The P2 port is connected to the SCLK, MOSI, MISO, SS, and RAC pins of the 33180 in turn. During the recording operation, when the stored information reaches the end of each row of the storage array, the RAC terminal will issue a certain high pulse length, and the MCU will address at this time. The variable is incremented by one to record the address information of the voice chip. At the end of each piece of voice information, the voice chip will issue an interrupt and send the interrupt signal to the input of the external interrupt 0 of the microcontroller.
Before the microcontroller is required to work, the MCU is in the loop query state. Once the K2, K4, K5, and K6 keys of the P1 port are signaled, the pointer table will jump to the respective subroutine to perform the corresponding operation. Taking the playback operation subroutine as an example, the POWERUP command, the SETPLAY command and the PLAY command are issued to the voice chip, and then the wait state is queried to check whether the STOP button of the P1.2 port is triggered. If there is a trigger, the playback operation is terminated and the loop query portion is entered. The normal end of the playback operation is through the interrupt subroutine of external interrupt 0.
Play subroutine list:
PLAY: MOV OISTO1, #20H
LCALL TRANS ; issue POWERUP command
MOV TMOD, #01H
MOV DPTR , #25536
MOV TH0, DPH
MOV TL0, DPL
SETB TR0
JNB TF0,$;waiting TPUD40ms time
MOV OISTO, PFROM
MOV OISTO1, PFROM1
; read the first address of the play record
ANL OISTO1, #07H
ORL OISTO1, #0E0H
LCALL TRANS ; issue the SETPLAY command
ORL OISTO1, #0F0H
LCALL TRANS ; Issue the PLAY command
MOV IE, #81H
HERE: JB P1.2, OVER ; end if the request is aborted
SJMP HERE
OVER: MOV OISTO1, #10H
LCALL TRANS; issue the STOPPWRDN command
LJMP SELECT
INTX0: MOV IE, #0
LJMP OVER ; playback ends
RETI
Note:
TRANS is the communication subroutine between the MCU and the voice chip.
OISTO and OISTO1 are registers that store control bits and addresses.
SELECT is a loop query subroutine
INTX0 is the interrupt subroutine
Other recording subroutines, pre- and sub-subroutines are similar to the programs that are played, and will not be described here.
Several problems should be paid attention to when using ISD33000
· The audio signal output power of the ISD device is very small, and it is not possible to directly drive the speaker. It is necessary to add an audio amplifier such as the LM386. At the same time, the signal sent by the ISD needs to be capacitively coupled to isolate the DC component to avoid saturation.
• Pay attention to the RAC port. Each time a line of recording, playback, and search operations is completed, the port outputs a positive pulse. The MCU detects this positive pulse, corresponding to the current row address, and can be used to accurately locate the recording and playback information.
• When interrupt data is shifted out of the MISO pin of the ISD33000 device, the control and address bits are simultaneously shifted into the MOSI pin. Therefore, it should be noted that the transmitted data conforms to the operation of the current system.
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